/* * Intel ACPI Component Architecture * AML/ASL+ Disassembler version 20170929 (64-bit version) * Copyright (c) 2000 - 2017 Intel Corporation * * Disassembling to symbolic ASL+ operators * * Disassembly of SSDT.13, Tue Dec 5 21:10:12 2017 * * Original Table Header: * Signature "SSDT" * Length 0x00000763 (1891) * Revision 0x01 * Checksum 0x25 * OEM ID "PmRef" * OEM Table ID "CpuPm" * OEM Revision 0x00003000 (12288) * Compiler ID "INTL" * Compiler Version 0x20120913 (538052883) */ DefinitionBlock ("", "SSDT", 1, "PmRef", "CpuPm", 0x00003000) { External (_PR_.CPU0, DeviceObj) External (_PR_.CPU1, DeviceObj) External (_PR_.CPU2, DeviceObj) External (_PR_.CPU3, DeviceObj) Scope (\) { Name (SSDT, Package (0x0C) { "CPU0IST ", 0x7B20C798, 0x000006E6, "APIST ", 0x7B20EE18, 0x0000015F, "CPU0CST ", 0x7B20BC18, 0x000003A5, "APCST ", 0x7B20DF18, 0x0000008D }) Name (CFGD, 0x73B92803) Name (\PDC0, 0x80000000) Name (\PDC1, 0x80000000) Name (\PDC2, 0x80000000) Name (\PDC3, 0x80000000) Name (\SDTL, Zero) } Scope (\_PR.CPU0) { Name (HI0, Zero) Name (HC0, Zero) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { Local0 = CPDC (Arg0) GCAP (Local0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Local0 = COSC (Arg0, Arg1, Arg2, Arg3) GCAP (Local0) Return (Local0) } Method (CPDC, 1, NotSerialized) { CreateDWordField (Arg0, Zero, REVS) CreateDWordField (Arg0, 0x04, SIZE) Local0 = SizeOf (Arg0) Local1 = (Local0 - 0x08) CreateField (Arg0, 0x40, (Local1 * 0x08), TEMP) Name (STS0, Buffer (0x04) { 0x00, 0x00, 0x00, 0x00 // .... }) Concatenate (STS0, TEMP, Local2) Return (COSC (ToUUID ("4077a616-290c-47be-9ebd-d87058713953"), REVS, SIZE, Local2)) } Method (COSC, 4, NotSerialized) { CreateDWordField (Arg3, Zero, STS0) CreateDWordField (Arg3, 0x04, CAP0) CreateDWordField (Arg0, Zero, IID0) CreateDWordField (Arg0, 0x04, IID1) CreateDWordField (Arg0, 0x08, IID2) CreateDWordField (Arg0, 0x0C, IID3) Name (UID0, ToUUID ("4077a616-290c-47be-9ebd-d87058713953")) CreateDWordField (UID0, Zero, EID0) CreateDWordField (UID0, 0x04, EID1) CreateDWordField (UID0, 0x08, EID2) CreateDWordField (UID0, 0x0C, EID3) If (!(((IID0 == EID0) && (IID1 == EID1)) && (( IID2 == EID2) && (IID3 == EID3)))) { STS0 = 0x06 Return (Arg3) } If ((Arg1 != One)) { STS0 = 0x0A Return (Arg3) } Return (Arg3) } Method (GCAP, 1, NotSerialized) { CreateDWordField (Arg0, Zero, STS0) CreateDWordField (Arg0, 0x04, CAP0) If (((STS0 == 0x06) || (STS0 == 0x0A))) { Return (Zero) } If ((STS0 & One)) { CAP0 &= 0x0BFF Return (Zero) } PDC0 = ((PDC0 & 0x7FFFFFFF) | CAP0) /* \_PR_.CPU0.GCAP.CAP0 */ If ((CFGD & One)) { If ((((CFGD & 0x01000000) && ((PDC0 & 0x09) == 0x09)) && !(SDTL & One))) { SDTL |= One OperationRegion (IST0, SystemMemory, DerefOf (SSDT [One]), DerefOf (SSDT [0x02])) Load (IST0, HI0) /* \_PR_.CPU0.HI0_ */ } } If ((CFGD & 0x82)) { If ((((CFGD & 0x01000000) && (PDC0 & 0x18)) && ! (SDTL & 0x02))) { SDTL |= 0x02 OperationRegion (CST0, SystemMemory, DerefOf (SSDT [0x07]), DerefOf (SSDT [0x08])) Load (CST0, HC0) /* \_PR_.CPU0.HC0_ */ } } Return (Zero) } } Scope (\_PR.CPU1) { Name (HI1, Zero) Name (HC1, Zero) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { Local0 = \_PR.CPU0.CPDC (Arg0) GCAP (Local0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Local0 = \_PR.CPU0.COSC (Arg0, Arg1, Arg2, Arg3) GCAP (Local0) Return (Local0) } Method (GCAP, 1, NotSerialized) { CreateDWordField (Arg0, Zero, STS1) CreateDWordField (Arg0, 0x04, CAP1) If (((STS1 == 0x06) || (STS1 == 0x0A))) { Return (Zero) } If ((STS1 & One)) { CAP1 &= 0x0BFF Return (Zero) } PDC1 = ((PDC1 & 0x7FFFFFFF) | CAP1) /* \_PR_.CPU1.GCAP.CAP1 */ If (((PDC0 & 0x09) == 0x09)) { APPT () } If ((PDC0 & 0x18)) { APCT () } Return (Zero) } Method (APCT, 0, NotSerialized) { If (((CFGD & 0x82) && !(SDTL & 0x20))) { SDTL |= 0x20 OperationRegion (CST1, SystemMemory, DerefOf (SSDT [0x0A]), DerefOf (SSDT [0x0B])) Load (CST1, HC1) /* \_PR_.CPU1.HC1_ */ } } Method (APPT, 0, NotSerialized) { If (((CFGD & One) && !(SDTL & 0x10))) { SDTL |= 0x10 OperationRegion (IST1, SystemMemory, DerefOf (SSDT [0x04]), DerefOf (SSDT [0x05])) Load (IST1, HI1) /* \_PR_.CPU1.HI1_ */ } } } Scope (\_PR.CPU2) { Name (HI1, Zero) Name (HC1, Zero) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { Local0 = \_PR.CPU0.CPDC (Arg0) GCAP (Local0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Local0 = \_PR.CPU0.COSC (Arg0, Arg1, Arg2, Arg3) GCAP (Local0) Return (Local0) } Method (GCAP, 1, NotSerialized) { CreateDWordField (Arg0, Zero, STS1) CreateDWordField (Arg0, 0x04, CAP1) If (((STS1 == 0x06) || (STS1 == 0x0A))) { Return (Zero) } If ((STS1 & One)) { CAP1 &= 0x0BFF Return (Zero) } PDC1 = ((PDC1 & 0x7FFFFFFF) | CAP1) /* \_PR_.CPU2.GCAP.CAP1 */ If (((PDC0 & 0x09) == 0x09)) { APPT () } If ((PDC0 & 0x18)) { APCT () } Return (Zero) } Method (APCT, 0, NotSerialized) { If (((CFGD & 0x82) && !(SDTL & 0x20))) { SDTL |= 0x20 OperationRegion (CST1, SystemMemory, DerefOf (SSDT [0x0A]), DerefOf (SSDT [0x0B])) Load (CST1, HC1) /* \_PR_.CPU2.HC1_ */ } } Method (APPT, 0, NotSerialized) { If (((CFGD & One) && !(SDTL & 0x10))) { SDTL |= 0x10 OperationRegion (IST1, SystemMemory, DerefOf (SSDT [0x04]), DerefOf (SSDT [0x05])) Load (IST1, HI1) /* \_PR_.CPU2.HI1_ */ } } } Scope (\_PR.CPU3) { Name (HI1, Zero) Name (HC1, Zero) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { Local0 = \_PR.CPU0.CPDC (Arg0) GCAP (Local0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Local0 = \_PR.CPU0.COSC (Arg0, Arg1, Arg2, Arg3) GCAP (Local0) Return (Local0) } Method (GCAP, 1, NotSerialized) { CreateDWordField (Arg0, Zero, STS1) CreateDWordField (Arg0, 0x04, CAP1) If (((STS1 == 0x06) || (STS1 == 0x0A))) { Return (Zero) } If ((STS1 & One)) { CAP1 &= 0x0BFF Return (Zero) } PDC1 = ((PDC1 & 0x7FFFFFFF) | CAP1) /* \_PR_.CPU3.GCAP.CAP1 */ If (((PDC0 & 0x09) == 0x09)) { APPT () } If ((PDC0 & 0x18)) { APCT () } Return (Zero) } Method (APCT, 0, NotSerialized) { If (((CFGD & 0x82) && !(SDTL & 0x20))) { SDTL |= 0x20 OperationRegion (CST1, SystemMemory, DerefOf (SSDT [0x0A]), DerefOf (SSDT [0x0B])) Load (CST1, HC1) /* \_PR_.CPU3.HC1_ */ } } Method (APPT, 0, NotSerialized) { If (((CFGD & One) && !(SDTL & 0x10))) { SDTL |= 0x10 OperationRegion (IST1, SystemMemory, DerefOf (SSDT [0x04]), DerefOf (SSDT [0x05])) Load (IST1, HI1) /* \_PR_.CPU3.HI1_ */ } } } }